cad/MyHDL-gplcver/../../cad/py-MyHDL/patches/patch-cosimulation_cver_Makefile.lnx: d4970d90cbabefb580e5ee5656de9ce29979b854eca3d51b5e6886db2dad7133
cad/MyHDL-gplcver/DESCR: 07066270f0e22001c477e652799da4229f5c90a5685f58ad579e73a9cd0e3147
cad/MyHDL-gplcver/Makefile: a960c6cd94609a07c94ce3dd9096b1cec4119cd27f6c1ed11b6042360bd58c25
cad/MyHDL-gplcver/PLIST: 157621a0bab7355a146505d6ab44a8248fd888ed21437f3d197b901b67ca4d68
